1. Field of the Invention
The present invention relates to a data processing apparatus and a data processing method, for use in a high-speed serial communication.
2. Description of Related Art
One of world standards for optical transmission networks realizable of high-speed data communications is a SDH (Synchronous Digital Hierarchy). According to the SDH, a synchronous transfer module called a STM is provided as a data multiplexing unit. A STM-1 (Synchronous Transfer Module Level One) is a standard of the STM, and a bit rate of the STM-1 is 155.52 Mb/s.
The STM-1 has a frame consisting of a two-dimensional byte array of 9 columns by 270 rows. Head array of 9 columns by 9 rows of the two-dimensional byte array is called a section overhead, which will be called SOH, in the following. Array of 9 columns by 261 rows following the SOH, is called a payload. The SOH is a control part storing a frame synchronous signal, a maintenance information or the like, added to the payload, therein. The payload is a part storing multiplexed actual data therein.
According to the STM, because one frame is transmitted for every 125 microseconds, a bit rate is determined according as how many bytes one column by one row of data consists of. For example, according to the STM-1, because one column by one row of data consists of one byte, the bit rata is determined on 155.52 Mbps on the basis of the equation; 9 (columns)xc3x97270 (bytes)xc3x97(1/125 microseconds)=155.52. In the SDH, a STM-4 having four times as high a bit rata as the STM-1, wherein one column by one row of data consists of four bytes, a STM-16 having sixteen times as high a bit rata as the STM-1, wherein one column by one row of data consists of sixteen bytes, and so on are standardized.
Further, according to the STM, one frame is further partitioned into a plurality of time slots, for example, channels. Therefore, original data, that are user data or the like transmitted and received, are stored in each time slot, and thereby, a plurality of data are multiplexed. These multiplexed data are transmitted as serial data, through the SDH communication network.
In the data transmitted through the SDH communication network, predetermined data, for example, idle data, for indicating a data break or the like in the STM, are inserted. In order to distinguish the original data having the same code as a code of the idle data from the idle data, a predetermined data conversion is performed to the original data. Therefore, at the data receiving side, it is necessary to perform a transparent processing such that data converted at the data transmitting side is reconverted to the original data.
The transparent processing is a processing of parallel converting serial data received at the receiving side of the SDH communication network, to the parallel data, for every 8 bits, in order, and of converting (reconverting) the predetermined data that is transparent data converted at the transmitting side, of the parallel data, to the original data.
FIG. 12 is a schematic block diagram for showing a transparent processing according to an earlier development.
As shown in FIG. 12, serial data received at the data processing apparatus 100 are inputted to a transparent data detection unit 110 of the data processing apparatus 100. Then, the transparent data detection unit 110 detects information on transparent data of the received serial data, for example, an address or the like of transparent data, and transmits the received serial data and the detected information on transparent data to a transparent data conversion unit 120. The transparent data conversion unit 120 converts transparent data of the received serial data to predetermined original data on the basis of the detected information on transparent data.
When the transparent processing is carried out, and the transparent data are converted to the original data, the latter half byte of the detected transparent data is extracted from the detected transparent data. Thereby, idle data of bytes corresponding to the number of the transparent data are generated. Therefore, it is necessary to operate the data number that is the effective byte number, of one block that is one parallel data block, after the transparent data are converted, according to the data sequence, and to rearrange the effective data of the block on the basis of the effective byte number.
More specifically, in case the transparent processing is performed in the STM-16, when data are inputted for every four bytes at parallel to the transparent data detection unit, the transparent data detection unit detects transparent data in the inputted data. Then, the transparent data sampling unit samples the transparent data from the inputted data. Thereafter, the transparent data sampling unit moves data corresponding to the number of the transparent data sampled, forward, for every four bytes, and operates the effect byte number of the data sequence. The transparent data sampling unit outputs the data from which the transparent data have been sampled and the information on the effect byte number, to the transparent data array unit.
The transparent data array unit further moves the data to the part of the idle byte data, forward, on the basis of the data from which the transparent data have been sampled and the information on the effect byte number, to reconstruct the parallel data. Because the idle data stream occurs every when the data are moved forward, the data from which the transparent data are sampled, are shifted by a flip-flop (F/F), and a data is extracted from the shifted data to interpolate the idle data stream. In case the transparent processing is carried out to the data for every four bytes, in order to generate effect data for every four bytes, three shifted data is generated by the flip-flop (F/F), and the data is extracted from the three shifted data according to a selection signal.
On the other hand, with the increase of the communication data quantity, the utilization of a high-speed data communication on the basis of a STM-64 is increasing. Although a device drivable at 10 GHz is necessary for the high-speed data communication such as the STM-64, such a device does is not provided at present. As a result, considering the realization of the high-speed data communication by an existing FPGA (Field Programmable Gate Array), the data are processed for every 16 bytes at 78 MHz, at parallel.
However, because the transparent data sampling unit moves data of 16 byte parallel data, forward, there has been a problem that the transparent data sampling unit cannot processes the data at 78 MHz in the FPGA, by performing the same processing to the data as that to the 4 byte parallel data.
Further, in case the transparent data array unit rearranges the parallel data, in order to generate the effect data for every 16 byte parallel data, it is necessary that the F/F generates fifteen data and extracts the effect data from the fifteen generated data on the basis of the selection signal. Accordingly, there have been problems that the circuit scale is enlarged and the outputted selection signal becomes complex.
The present invention was developed in order to solve the problems as mentioned above.
An object of the present invention is to provide a data processing apparatus and a data processing method easily realizable of a transparent processing of a high-speed serial data on the basis of a STM or the like.
In accordance with a first aspect of the present invention, a data processing apparatus (for example, a data processing apparatus 1 shown in FIG. 1) for use in a high-speed serial data communication, comprises: a serial data conversion section (for example, an interface which is provided at an input terminal of the data processing apparatus 1 and which is not shown in figures) for receiving high-speed serial data, and converting the high-speed serial data to first predetermined set of parallel data; a transparent data information detection section (for example, a transparent data detection unit 10 shown in FIG. 1) for detecting information concerning transparent data, from the first predetermined set of parallel data; an effective byte number operation section (for example, adders 202_1, 202_2 and 204 shown in FIG. 2) for operating an effective byte number of the first predetermined set of parallel data, on the basis of the information concerning transparent data; a transparent data conversion section (for example, a transparent data sampling unit 20 shown in FIG. 1) for converting transparent data of the first predetermined set of parallel data, and moving predetermined data after the transparent data forward, in the first predetermined set of parallel data, to arrange the first predetermined set of parallel data, on the basis of the information concerning transparent data and the effective byte number; an address control section (for example, a pointer 304 shown in FIG. 7) for determining addresses at which the first predetermined set of parallel data arranged by the transparent data conversion section are rearranged, on the basis of the effective byte number; and a data array section (for example, a transparent data array unit 30 shown in FIG. 1) for moving predetermined data to one first predetermined set of parallel data from another first predetermined set of parallel data following the one first predetermined set of parallel data, to rearrange the first predetermined set of parallel data at the addresses, on the basis of the effective byte number and the addresses.
Herein, the first predetermined set of parallel data means parallel data generated by partitioning the serial data into a first predetermined number, and inputted from the serial data conversion section to the transparent data information detection section at the substantially same time. Further, the effective byte number means a byte number of effective data of the first predetermined set of parallel data. Furthermore, the transparent data is data converted to a predetermined data at a data transmitting side, in order to distinguish original data having the same code as that of idle data from idle data.
Further, the function that the transparent data conversion section moves predetermined data after the transparent data forward, in the first predetermined set of parallel data means to move predetermined data following the transparent data, corresponding to the number of the transparent data included in the first predetermined set of parallel data, to fill idle data generated by converting the transparent data, with the predetermined data as effective data. Furthermore, the function that the data array section moves predetermined data to one first predetermined set of parallel data from another first predetermined set of parallel data means to move predetermined data of the latter first predetermined set of parallel data, corresponding to the number of the transparent data included in the former first predetermined set of parallel data, to fill the former first predetermined set of parallel data with effective data.
In accordance with a second aspect of the present invention, a data processing method of data in a high-speed serial data communication, comprises the steps of: receiving high-speed serial data, and converting the high-speed serial data to first predetermined set of parallel data; detecting information concerning transparent data, from the first predetermined set of parallel data; operating an effective byte number of the first predetermined set of parallel data, on the basis of the information concerning transparent data; converting transparent data of the first predetermined set of parallel data, and moving predetermined data after the transparent data forward, in the first predetermined set of parallel data, to arrange the first predetermined set of parallel data, on the basis of the information concerning transparent data and the effective byte number; determining addresses at which the first predetermined set of parallel data arranged are rearranged, on the basis of the effective byte number; and moving predetermined data to one first predetermined set of parallel data from another first predetermined set of parallel data following the one first predetermined set of parallel data, to rearrange the first predetermined set of parallel data at the addresses, on the basis of the effective byte number and the addresses.
According to the data processing apparatus or the data processing method of the first or second aspect of the present invention, because the received serial data are converted to the first predetermined set of parallel data, and the first predetermined set of parallel data are processed on the basis of the detected information concerning transparent data, it is possible to easily perform the transparent processing only by a relatively low-speed conventional device.
Preferably, in the data processing apparatus according to the first aspect of the present invention, the transparent data information detection section comprises a storage section for storing one first predetermined set of parallel data converted by the serial data conversion section therein, and detects the information concerning transparent data from data at a last address of the one first predetermined set of parallel data stored in the storage section and data at a top address of another first predetermined set of parallel data converted following the one first predetermined set of parallel data.
Preferably, the data processing method according to the second aspect of the present invention, further comprises the steps of: storing one first predetermined set of parallel data converted in a storage section; and detecting the information concerning transparent data from data at a last address of the one first predetermined set of parallel data stored in the storage section and data at a top address of another first predetermined set of parallel data converted following the one first predetermined set of parallel data.
According to the data processing apparatus or the data processing method as described above, if the transparent data are partitioned into two first predetermined set of parallel data when the received serial data are converted to the first predetermined set of parallel data, because the information concerning transparent data bridging two first predetermined set of parallel data can be detected, it is possible to perform the transparent processing without leaving the transparent data in the first predetermined set of parallel data.
Preferably, in the data processing apparatus according to the first aspect of the present invention, the transparent data information detection section comprises: a transparent data detection section for detecting an address and a number of transparent data included in the first predetermined set of parallel data converted by the serial data conversion section; and a transparent data information transmission section for transmitting the address and the number of transparent data detected by the transparent data detection section, as the information concerning transparent data, to the effective byte number operation section.
Preferably, the data processing method according to the second aspect of the present invention, further comprises the steps of: detecting an address and a number of transparent data included in the first predetermined set of parallel data converted; and transmitting the address and the number of transparent data detected, as the information concerning transparent data.
According to the data processing apparatus or the data processing method as described above, because it is possible to determine a number of effective data included in each first predetermined set of parallel data, after the transparent processing, it is possible to easily understand a data structure of each first predetermined set of parallel data.
Preferably, in the processing apparatus according to the first aspect of the present invention, the transparent data conversion section comprises: a plurality of transparent processing sections (for example, 4 byte processing blocks 201_1 to 201_4 shown in FIG. 2) for converting transparent data of the first predetermined set of parallel data to original data, for every second predetermined set of parallel data, on the basis of the information concerning transparent data detected by the transparent data information detection section; and a plurality of data moving sections (for example, a SW1_1, a SW1_2 and a SW2 shown in FIG. 2) for moving predetermined data after the transparent data forward, in the second predetermined set of parallel data, on the basis of the effective byte number operated by the effective byte number operation section.
Herein, the second predetermined set of parallel data is one of a plurality of sets of parallel data into which the first predetermined set of parallel data are partitioned. Therefore, the data unit of the second predetermined set of parallel data is smaller than that of the first predetermined set of parallel data.
Preferably, the data processing method according to the second aspect of the present invention, further comprises the steps of: converting transparent data of the first predetermined set of parallel data to original data, for every second predetermined set of parallel data, on the basis of the information concerning transparent data; and moving predetermined data after the transparent data forward, in the second predetermined set of parallel data, on the basis of the effective byte number.
According to the data processing apparatus or the data processing method as described above, the first predetermined set of parallel data can be generated by converting the transparent data for every the second predetermined set of parallel data, and performing the transparent processing to the second predetermined set of parallel data at a plurality of steps. Consequently, because the processing data unit can be reduced, it is possible to arrange parallel data without reducing the processing speed.
Preferably, in the data processing apparatus according to the first aspect of the present invention, the data array section comprises: a data reading out section (for example, a selector 306 shown in FIG. 7) for reading out a third predetermined set of parallel data from the first predetermined set of parallel data every when the third predetermined set of parallel data are rearranged at the predetermined addresses by moving the predetermined data to the one first predetermined set of parallel data from the another first predetermined set of parallel data, on the basis of the effective byte number and the addresses; and a read out timing control section (for example, a controller 307 shown in FIG. 7) for controlling a timing at which the data reading out section reads out the third predetermined set of parallel data, on the basis of the effective byte number and the addresses.
Herein, the third predetermined set of parallel data is one of a plurality of sets of parallel data into which the first predetermined set of parallel data are partitioned. Therefore, the data unit of the third predetermined set of parallel data is smaller than that of the first predetermined set of parallel data.
Preferably, the data processing method according to the second aspect of the present invention, further comprises the steps: reading out a third predetermined set of parallel data from the first predetermined set of parallel data every when the third predetermined set of parallel data are rearranged at the predetermined addresses by moving the predetermined data to the one first predetermined set of parallel data from the another first predetermined set of parallel data, on the basis of the effective byte number and the addresses; and controlling a timing at which the third predetermined set of parallel data is read out, on the basis of the effective byte number and the addresses.
According to the data processing apparatus or the data processing method as described above, it is possible to rearrange parallel data according to a simple signal, only by using a relatively low-speed conventional device, without enlarging a size of a processing circuit.
In accordance with a third aspect of the present invention, a data processing apparatus (for example, a data processing apparatus 1 shown in FIG. 1) for use in a high-speed serial data communication, comprises: an interface section for converting high-speed serial data to 16 byte parallel data; a transparent data detection unit (for example, a transparent data detection unit 10 shown in FIG. 1) for detecting information on transparent data from the 16 byte parallel data; four processing blocks (for example, 4 byte processing blocks 201_1 to 201_4 shown in FIG. 2) for converting transparent data and operating an effective byte number, of the 16 byte parallel data, for every 4 byte parallel data, on the basis of the information on transparent data; two first switches (for example, a SW1_1 and a SW1_2 shown in FIG. 2) each of which moves effective data to one 4 byte parallel data from another 4 byte parallel data following the one 4 byte parallel data, to arrange 8 byte parallel data, on the information on transparent data and the effective byte number; a second switch (for example, a SW2 shown in FIG. 2) for moving effective data to one 8 byte parallel data from another 8 byte parallel data following the one 8 byte parallel data, to arrange 16 byte parallel data, on the information on transparent data and the effective byte number; a pointer (for example, a pointer 304 shown in FIG. 7) for determining addresses at which the 16 byte parallel data are rearranged, on the effective byte number; and a data array unit (for example, a F/F Array 305 shown in FIG. 7) for moving effective data to one 16 byte parallel data from another 16 byte parallel data following the one 16 byte parallel data, to rearrange 16 byte parallel data filled with effective data, at the addresses, on the basis of effective byte number and the addresses.
In accordance with a fourth aspect of the present invention, a data processing method of data in a high-speed serial data communication, comprises the steps of: converting high-speed serial data to 16 byte parallel data; detecting information on transparent data from the 16 byte parallel data; converting transparent data and operating an effective byte number, of the 16 byte parallel data, for every 4 byte parallel data, on the basis of the information on transparent data; moving effective data to one 4 byte parallel data from another 4 byte parallel data following the one 4 byte parallel data, to arrange 8 byte parallel data, on the information on transparent data and the effective byte number; moving effective data to one 8 byte parallel data from another 8 byte parallel data following the one 8 byte parallel data, to arrange 16 byte parallel data, on the information on transparent data and the effective byte number; determining addresses at which the 16 byte parallel data are rearranged, on the effective byte number; and moving effective data to one 16 byte parallel data from another 16 byte parallel data following the one 16 byte parallel data, to rearrange 16 byte parallel data filled with effective data, at the addresses, on the basis of effective byte number and the addresses.